Direct access memory

 is a feature that allows certain hardware subsystems within the computer to   access system memory independently of the central processing unit(CPU).

-special Purpose processor: DMA controller

           -It has many DMA channels for many peripheral devices.

           -can generate addresses and initiate memory read or write cycles.

           -contains several registers that can be written and read by the CPU.

                     -a memory address register, 

                     -a byte count register, 

                     -one or more control registers.

DMA operation involves loading programs or data files from disk into memory, saving file on disk, and accessing virtual memory pages on any secondary storage medium.

Processor writes the data DMA access data and continuous working.

With DMA, the CPU initiates the transfer, does other operations while the transfer is in progress, and receives an interrupt from the DMA controller when the operation is done. It useful when CPU cannot keep up with the rate of data transfer or needs to perform useful work while waiting for a relatively slow I/O data transfer.

Without DMA, when the CPU is using programmed input/ output. it is typically fully occupied for the entire duration of the read or write operation, and is thus unavailable to perform other work.

DMA controllers are standard components in PC.

Many hardware system using DMA, include graphic card and network card.

Main structure of DMA controller:

                 - Bus buffers

                 - Timing and control

DMA/ VM Interaction

Operating system uses virtual addresses for memory. DMA block may not be contiguous in physical memory. DMA need a controller to translate

If DMA uses physical addresses

             -may need to break transfers into page-sized chunks

             -chain multiple transfers

             -allocate contiguous physical pages for DMA

DMA Transfer

1. device driver is told to transfer disk data to buffer at address X
2. device driver tells disk controller to transfer C bytes from disk to buffer at address X
3. disk controller initiates DMA transfer
4. disk controller sends each byte to DMA controllers DMA controller transfer bytes to buffer X, increasing memory address and decreasing C until C=0
5. when C=0, DMA interrupts CPU to signal transfer completion

Input/Output Transfer Mode

1. Serial
2. parallel
   
   

Serial Transfer

Asynchronous and Synchronous clocking

Asynchronous - no common clock

      data transfer between two independent units requires that control signals be  

     transmitted between the communicating units to indicate the

      time at which data is being transmitted

Two Asynchronous Data Transfer Method

Strobe pulse- A strobe pulse is supplied by one unit to indicate the other unit 

                      when the transfer has to occur

Handshaking- A control signal is accompanied with each data being transmitted to 

                       indicate the presence of data- The receiving unit responds with 

                       another control signal to acknowledge receipt of the data

Synchronous – all derive the timing information from common clock line

                         verification by synchronization pattern

Parallel Transfer

Data Transfer - read sector

                       - write sector

control -Disk seek

Transfer Integrity -transfer parity and data encoding

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